1. Field of the Invention
The invention relates to the recovery of a clock signal from transmitted data when all that is available is a bit stream of random nonreturn-to-zero (NRZ) data. In particular, the invention relates to a circuit which works in conjunction with the clock recovery circuit to provide a logical output corresponding to whether or not the clock recovery circuit has been successful.
2. Description of the Prior Art
An NRZ data stream, to which the invention has application, is a two-state signal which assumes either a "positive" or "negative" state corresponding to a binary "1" or a "0". In other words, each state continues for the full duration of the clocking interval, and no change occurs between successive like states at the boundary between clocking intervals. The clock signal is a square wave of frequency equal to the bit rate of the NRZ data input, phased so that the positive transitions of this wave occur simultaneously with the time of possible transition in the NRZ data. When data is stored or transmitted over a communication link, it is generally not efficient to also store or transmit the clock signal which is required by the receiving circuitry to strobe the data signal in order to evaluate it and to enumerate the incoming bits for subsequent processing. A clock recovery circuit is employed to obtain this information from the NRZ data stream available from the storage or transmission medium.
Clock recovery circuits are increasingly being implemented as phaselock loops due to the elimination of tank circuits using ferrite-core inductors that vary unpredictably with temperature. These circuits often feature either frequency-sweep or wide-bandwidth aided acquisition. In either case, a binary signal indicating successful clock acquisition is needed to turn off the acquisition-aid circuit. Indication of clock acquisition is often crucial in systems requiring joint acquisition of clock and carrier such as coherent receivers for continuous-phase frequency-shift keyed (CPFSK) signals. Also, indication of clock acquisition is a useful indicator of signal reception at a certain location in a complex communication system. Indications like this from various points can be used to isolate problems in circuits or transmission media. In this latter case especially, the condition of "no signal input" must be detected as "no clock acquisition" by the indicator circuit.
Some prior designs have either omitted the clock acquisition indicator circuit or have interpreted a stable state of the phase lock loop VCO control voltage as an indication of clock recovery, which is not a reliable indication. In some cases, this has been slightly improved by also requiring that the envelope of an input signal be present. Equipments are known which have a reliable lock indicator for clock acquisition from the bipolar, 50% duty-cycle data signal commonly transmitted over twisted pairs in telecommunication systems, but reliable clock acquisition indicators for a clock recovery circuit operating on NRZ data are not readily available.